The present invention relates to semiconductor devices and manufacturing technologies therefor and in particular to a technology effectively applicable to reduction in the size and thickness of a semiconductor device.
Patent Document 1 (Japanese Unexamined Patent Publication No. Hei 11(1999)-251504) discloses a structure in which an electrode in an electronic component main body is bonded to an electrode member comprised of a lead frame by thermocompression or soldering.
Patent Document 2 (Japanese Unexamined Patent Publication No. Hei 3(1991)-94460) discloses the following structure and a manufacturing method therefor: a structure in which a semiconductor chip is flip chip bonded to a bonding portion in a circuit pattern comprised of a metal layer, formed over a transfer film through a bump.
[Patent Document 1]
Japanese Unexamined Patent Publication No. Hei 11(1999)-251504 [Patent Document 2]
Japanese Unexamined Patent Publication No. Hei 3(1991)-94460